Technology | 2010.02.01
Virage Logic’s 45nm and 28nm SiWare™ Memory Compilers Automatically Support Calypto’s PowerPro® MG tool
SANTA CLARA, Calif.--(BUSINESS WIRE)--Calypto® Design Systems Inc. (www.calypto.com), the leader in sequential analysis technology, today announced that Virage Logic’s 45-nanometer (nm) and 28nm SiWare™ Memory compilers now automatically generate PowerPro® MG power optimization models for reducing System-on-Chip (SoC) embedded memory power. This support is the result of a close, ongoing collaboration between the two companies to dramatically reduce on-chip SoC memory power.
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